About me
I am a recent MTech. graduate in Signal Processing from Electrical Engineering department at Indian Institute of Science (IISc), Bangalore. I am currently working on a research project with Dr. Clément Canonne (University of Sydney). I am broadly interested in the theoretical aspects of statistical inference. I did my master’s thesis on Markov Chain Monte Carlo algorithms under the guidance of Prof. Navin Kashyap. Long ago, I worked at Texas Instruments, Bangalore as an analog design and characterization engineer. You can find my CV here.
Publications
- A. J. George and N. Kashyap, “An MCMC method to sample from lattice distributions,” in IEEE International Symposium on Information Theory (ISIT), 2021, pp. 3074–3079. Available at arXiv
Patents
- S. K. R. Naru, A. J. George, S. Dusad, and P. Visvesvaraya, “Gain correction for multi-bit successive-approximation register,” United States Patent and Trademark Office (USPTO), Patent No: 10790841, 2020.
- R. Soundararajan, P. Visvesvaraya, and A. J. George, “Multi-bit successive-approximation register analog-to-digital converter,” United States Patent and Trademark Office (USPTO), Patent No: 10484001, 2019.
- A. J. George, R. Soundararajan, and P. Visvesvaraya, “Capacitor calibration,” United States Patent and Trademark Office (USPTO), Patent No: 10038453, 2018.
Projects
- Robust hypothesis testing
- Sampling from high-dimensional probability distributions, Master’s thesis.